Field
Embodiments of a semiconductor package having a cascaded chip stack are disclosed herein.
Description of Related Art
Recently, to increase an operational speed of mobile dynamic random access memory (DRAM) and to meet high capacity needs, a mirror die package (MDP) structure has been developed. Since a conventional MDP structure has a structure in which an upper semiconductor chip is bonded on a lower semiconductor chip in a flip chip bonding method, which is bonded to a substrate in a wire bonding method, a wire used in a wire bonding method is located between the lower semiconductor chip and the upper semiconductor chip. To this end, a distance between the lower semiconductor chip and the upper semiconductor chip should be constantly maintained.
Generally, the MDP structure requires a small mold thickness due to a characteristic of a package on package (PoP) structure. In order to satisfy the never ending demand for smaller chip packages, and as the distance between the lower semiconductor chip and the upper semiconductor chip should be constantly maintained, thicknesses of the lower semiconductor chip and the upper semiconductor chip should be reduced. Because of this, when the upper semiconductor chip is bonded on the lower semiconductor chip, it is easy to warp or damage the upper semiconductor chip. Thus, there is a need for improved bonding techniques between the upper semiconductor chip and the lower semiconductor chip in a a minor die package (MDP).